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2006
IEEE

Generic netlist representation for system and PE level design exploration

14 years 5 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems require more productive design approaches starting from high-level languages such as C. On the other hand, tight constraints of embedded systems require careful design exploration at system level (coarse grained exploration) and at the processing-element (PE) level (fine grained exploration). In this paper we presented GNR, a formal modeling approach, developed to improve productivity of designing systems and processing elements, the same way that traditional ADLs improved productivity for designing processors. The GNR is an order of magnitude shorter than state-of-the-art ADLs with RTL generation capabilities and yet can capture any structural details that affect the implementation quality. Using relatively short GNR description, we explored several designs for implementing an MP3 decoder and achieved 3.25 speedup...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,
Added 10 Jun 2010
Updated 10 Jun 2010
Type Conference
Year 2006
Where CODES
Authors Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski
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