Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications

The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as of communication architecture, both affect the power efficiency of the design. In this paper we propose a novel approach that enables energy-aware co-synthesis of both memory and communication architecture for streaming applications. As opposed to earlier techniques, we employ a powerful compile-time analysis of memory access behavior that adds flexibility in selecting memory architectures. Additionally, we target TDMA bus-based communication architectures, which not only guarantee performance, but also greatly reduce the design time and allow us to find the energy optimal system configuration. We propose and compare three techniques: an optimal mixed ILPbased co-synthesis technique, a mixed ILP-based traditional twostep synthesis approach where memory and communication synthesis is performed sequentially, a...

• Type: Conference
• Year: 2006
• Where: CODES
• Authors: Ilya Issenin, Nikil Dutt
• Keywords: Bus-based Communication Architectures, CODES 2006, Communication Architectures, Hardware-Software Codesign, Memory Architectures