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GLVLSI
2006
IEEE

A design methodology for temperature variation insensitive low power circuits

14 years 5 months ago
A design methodology for temperature variation insensitive low power circuits
Operating an integrated circuit at the prescribed nominal supply voltage is not preferable for reliable circuit operation under temperature fluctuations. A design methodology based on optimizing the supply voltage for temperature variation insensitive circuit performance is presented in this paper. Circuits display temperature variation insensitive delay characteristics when operated at a supply voltage 45% to 53% lower than the nominal supply voltage (VDD =
Ranjith Kumar, Volkan Kursun
Added 11 Jun 2010
Updated 11 Jun 2010
Type Conference
Year 2006
Where GLVLSI
Authors Ranjith Kumar, Volkan Kursun
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