Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors

To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constraints, distributed register files, variablelength encodings for instructions, and special data paths are frequently adopted. This creates challenges to deploy software toolkits for new embedded DSP processors. This article presents our methods and experiences to develop software and toolkit flows for PAC (Parallel Architecture Core) VLIW DSP processors. Our toolkits include compilers, assemblers, debugger, and DSP micro-kernels. We first retarget Open Research Compiler (ORC) and toolkit chains for PAC VLIW DSP processor and address the issues to support distributed register files and ping-pong data paths for embedded VLIW DSP processors. Second, the linker and assmeber are able to support variable length encoding schemes for DSP instructions. In addition, the debugger and DSP micro-kernel were designed to...

• Type: Conference
• Year: 2006
• Where: RTCSA
• Authors: Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu, Wen-Li Shih, Shih-Chang Chen, Chung-Kai Chen, Chien-Ching Huang, Yi-Ping You, Jenq Kuen Lee
• Keywords: Embedded Vliw Dsp, Real-Time Computing, Register files, RTCSA 2006, VLIW DSP Processors