An Integrated Partitioning and Scheduling Based Branch Decoupling

Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate the penalties associated with conditional branch instructions. However, branches still constitute one of the main hurdles towards achieving higher ILP. Dynamic branch prediction relies on the temporal locality of and spatial correlations between branches. Branch decoupling is yet another mechanism that exploits the innate lead in the branch schedule with respect to the rest of the computation. The compiler is responsible for generating the two maximally decoupled instruction streams: branch stream and program stream. Our earlier work on trace based evaluation of branch decoupling demonstrates a performance advantage of between 12% to 46% over 2-level branch prediction. However, how much of these gains are achievable through static, compiler driven decoupling is not known. This paper answers the question partial...

• Type: Conference
• Year: 2005
• Where: APCSAC
• Authors: Pramod Ramarao, Akhilesh Tyagi
• Keywords: APCSAC 2005, Branch Decoupling, Branch Prediction, Dynamic Branch Prediction