Sciweavers

ASAP
2005
IEEE

Expression Synthesis in Process Networks generated by LAURA

14 years 5 months ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application as a Process Network in which the control is parameterized and distributed. This control is given as parameterized polytopes that are expressed in terms of pseudo-linear expressions. These expressions cannot always be mapped efficiently onto hardware as they contain multiplication and integer division operations. This obstructs the data flow through the processes. Therefore, we present in this paper the Expression Compiler that efficiently maps pseudolinear expressions onto a dedicated hardware datapath in such a way that the distributed and parameterized control never obstructs the data flow through processors. This compiler employs techniques like number theory axioms, method of difference, and predicated static single assignment code.
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter
Added 24 Jun 2010
Updated 24 Jun 2010
Type Conference
Year 2005
Where ASAP
Authors Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere
Comments (0)