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ICIP
2007
IEEE

DSP Implementation of Deblocking Filter for AVS

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DSP Implementation of Deblocking Filter for AVS
The in-loop deblocking filter contains highly adaptive processing on both sample level and block edge level, which inevitably appears in the loop kernel of the algorithm. Therefore it is a challenge for parallel processing on a digital signal processor (DSP) platform. In this paper, pipelined DSP solutions to the inloop deblocking filter in AVS1-P2 are presented. First, the whole filter process is divided into six sub-processes, so that the global filter structure can be improved to achieve regular processing flow. Then software pipelines are designed for these sub-processes, with elaborately allocating functional units and carefully choosing enhanced assembly instructions based on the DSP platform. The simulated results show that this efficient implementation can easily support real-time filter processing for high resolution videos.
Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao
Added 21 Oct 2009
Updated 27 Oct 2009
Type Conference
Year 2007
Where ICIP
Authors Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao
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