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FDL
2005
IEEE

Automatic synthesis of the Hardware/Software Interface

14 years 5 months ago
Automatic synthesis of the Hardware/Software Interface
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to achieve cost, power and time-to-market targets are severely lacking. System-level design and optimization techniques can significantly reduce the design gap by providing solutions that achieve correct-by-construction approach rather than the correct-by-iteration approach. This paper presents a programmatic interface generation tool for automating the generation of the hardware/software interfaces in the context of multiprocessor Systems-On-Chips, The solutions that we present are of crucial importance in a platform based design environment for building a flexible system with reusable IPs and CPU cores.
Francesco Regazzoni, André C. Nácul,
Added 24 Jun 2010
Updated 24 Jun 2010
Type Conference
Year 2005
Where FDL
Authors Francesco Regazzoni, André C. Nácul, Marcello Lajolo
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