Tolerance Models in Hardware Description Languages

This paper gives an overview of the error sources in the solution of DAEs and discusses how different algorithms use tolerances to control these errors. The tolerance models of the VerilogAMS and VHDL-AMS languages are described, and a rationale is given for the VHDL-AMS tolerance model. Several examples are presented to demonstrate the VHDL-AMS language features related to tolerances.

• Type: Conference
• Year: 2005
• Where: FDL
• Authors: Ernst Christen
• Keywords: FDL 2005, Tolerance Model, Vhdl-ams Language, VHDL-AMS Tolerance Model