Data flow and FSMs are used intensively to specify real-time systems in the field of mechatronics. Their implementation in FPGAs is discussed against the background of dynamic reconfiguration which can be used to reduce the amount of logic resources of the FPGA. Bit serial algorithms come into operation for data flow implementation. Particular attention has been paid for its synchronization in dynamic reconfigurable systems. Typically, a control system uses different functions depending on its operating state; dynamic reconfiguration is used to switch between them. This process is controlled by FSMs which are extension of the FSMs already used for specification of the real-time system. Dynamic loading of new logic is triggered in a distributed way by the active states of all FSMs and executed in a central way by a general control module. Synchronization and message passing is guaranteed by a distributed communication system. KEYWORDS Partial reconfiguration, hard real-time system, dis...