On-board fault-tolerant SAR processor for spaceborne imaging radar systems

A real-timehigh-performanceand fault-tolerantFPGA-based hardware architecture for the processing of synthetic apertureradar (SAR) images has been developed for advanced spaceborneradar imaging systems. In this paper, we present the integrated design approach,from top-level algorithm specifications, system architectures, design methodology,functionalverification, performance validation, down to hardware design and implementation. ‘i

• Type: Conference
• Year: 2005
• Where: ISCAS
• Authors: Wai-Chi Fang, C. Le, S. Taft
• Keywords: Integrated Design, ISCAS 2005, Spaceborneradar Imaging Systems, Top-level Algorithm Specifications