— We extend a 3D differential-operator-based filter architecture to a 3D IIR FPGA filter circuit implementation employing a recently proposed scanned-array method, which uses a single time-multiplexed A/D converter, resulting in the proposed low-complexity elemental predistorted scanned-array filter FPGA circuit. Test results confirm the low hardware complexity and the capability of operating in real-time over rectangular sensor arrays consisting of up to thousands of band-limited analog sensors. Cascaded connections of two frequency-planar filters are useful for implementing highlyselective 3D IIR beam plane-wave filters.
Arjuna Madanayake, Leonard T. Bruton