Very High Radix Scalable Montgomery Multipliers

This paper describes a very high radix scalable Montgomery multiplier. It extends the radix-2 Tenca-Koç scalable architecture using w × v – bit integer multipliers in place of AND gates. The new design can perform 1024-bit modular exponentiation in 6.6 ms using 2847 4-input lookup tables and 32 16 x 16 multipliers, making it the fastest scalable design yet reported.

• Type: Conference
• Year: 2005
• Where: IWSOC
• Authors: Kyle Kelley, David Harris
• Keywords: Bit Integer Multipliers, Hardware, IWSOC 2005, Scalable Montgomery Multiplier, Tenca-Koç Scalable Architecture