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CF
2004
ACM

MaRS: a macro-pipelined reconfigurable system

14 years 4 months ago
MaRS: a macro-pipelined reconfigurable system
We introduce MaRS, a reconfigurable, parallel computing engine with special emphasis on scalability, lending itself to the computation-/data-intensive multimedia data processing and wireless communication. Global communication between the processing elements (PEs) in MaRS is performed through a 2Dmesh deadlock-free network, avoiding any concerns due to nonscalable bus-based communication. Additionally, we have developed a second layer of inter-PE connection realized by distributed shared register files and conditional operands, to enhance the performance of MaRS for those applications demanding a tightly coupled PE array. We have modeled and verified a major part of MaRS. The promising results of our preliminary analyses show that MaRS can efficiently be tailored to different applications offering flexible data communication, and high performance. Categories and Subject Descriptors
Nozar Tabrizi, Nader Bagherzadeh, Amir Hosein Kama
Added 30 Jun 2010
Updated 30 Jun 2010
Type Conference
Year 2004
Where CF
Authors Nozar Tabrizi, Nader Bagherzadeh, Amir Hosein Kamalizad, Haitao Du
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