Yet Another Sieving Device

Abstract. A compact mesh architecture for supporting the relation collection step of the number field sieve is described. Differing from TWIRL, only isolated chips without inter-chip communication are used. According to a preliminary analysis for 768-bit numbers, with a 0.13 µm process one mesh-based device fits on a single chip of ≈(4.9 cm)2 —the largest proposed chips in the TWIRL cluster for 768-bit occupy ≈(6.7 cm)2 . A 300 mm silicon wafer filled with the mesh-based devices is ≈ 6.3 times slower than a wafer with TWIRL clusters, but due to the moderate chip size, lack of inter-chip communication, and the comparatively regular structure, from a practical point of view the mesh-based approach might be as attractive as TWIRL.

• Type: Conference
• Year: 2004
• Where: CTRSA
• Authors: Willi Geiselmann, Rainer Steinwandt
• Keywords: Cryptology, CTRSA 2004, Inter-chip Communication, Mm Silicon Wafer, Twirl Clusters