Digital circuit design through simulated evolution (SimE)

In this paper, the use of Simulated Evolution (SimE) Algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection and allocation. Two goodness measures are designed to guide the selection and allocation operations of SimE. Area, power and delay are considered in the optimization of circuits. Results obtained by SimE algorithm are compared to those obtained by Genetic Algorithm (GA).

• Type: Conference
• Year: 2003
• Where: CEC
• Authors: Sadiq M. Sait, Mostafa Abd-El-Barr, Uthman S. Al-Saiari, Bambang A. B. Sarif
• Keywords: Artificial Intelligence, CEC 2003, Digital Logic Circuits, SimE Algorithm, Simulated Evolution