Internet-based Tool for System-on-Chip Integration

A tool has been created for use in a design course to automate integration of new components into a SystemOn-Chip (SoC). Students used this tool to implement a complete SoC Internet firewall, which was prototyped and tested using a field-programmable gate array (FPGA). Common components of the framework were completed as machine problem assignments throughout the first half of the semester. During the second half of the semester, students worked in small groups to design extensible modules, which included additional packet filters, a packet encryption engine, and replacement schedulers, to enhance the functionality of the SoC firewall. The integration tool described in this paper was used to manage project submissions and to automatically generate synthesized designs for student testing and also project evaluation.

• Type: Conference
• Year: 2003
• Where: MSE
• Authors: David Lim, Christopher E. Neely, Christopher K. Zuver, John W. Lockwood
• Keywords: Field-programmable Gate Array, MSE 2003, SoC Firewall, SoC Internet Firewall