Internet-based Tool for System-On-Chip Project Testing and Grading

A tool has been developed to automate the testing and grading of design projects implemented in reprogrammable hardware. The server allows multiple students to test circuits in FPGA hardware over the internet. A web interface allows students to upload their placed and routed designs to the server, which batches the jobs together and (1) sequentially programs an FPGA board, (2) inputs test vectors, (3) generates a report that details the results, and (4) grades the design as either “pass” or “fail.” The single server allows entire class to share the same FPGA board.

• Type: Conference
• Year: 2003
• Where: MSE
• Authors: Christopher K. Zuver, Christopher E. Neely, John W. Lockwood
• Keywords: FPGA Board, FPGA Hardware, Interface Allows Students, MSE 2003