Factoring Estimates for a 1024-Bit RSA Modulus

We estimate the yield of the number field sieve factoring algorithm when applied to the 1024-bit composite integer RSA-1024 and the parameters as proposed in the draft version [17] of the TWIRL hardware factoring device [18]. We present the details behind the resulting improved parameter choices from [18].

• Type: Conference
• Year: 2003
• Where: ASIACRYPT
• Authors: Arjen K. Lenstra, Eran Tromer, Adi Shamir, Wil Kortsmit, Bruce Dodson, James Hughes, Paul C. Leyland
• Keywords: 1024-bit Composite Integer, ASIACRYPT 2003, Cryptology, Hardware Factoring Device, Sieve Factoring Algorithm