Sciweavers

GLVLSI
2002
IEEE

Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU

14 years 4 months ago
Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU
Joel Grodstein, Rachid Rayess, Tad Truex, Linda Sh
Added 14 Jul 2010
Updated 14 Jul 2010
Type Conference
Year 2002
Where GLVLSI
Authors Joel Grodstein, Rachid Rayess, Tad Truex, Linda Shattuck, Sue Lowell, Dan Bailey, David Bertucci, Gabriel P. Bischoff, Daniel E. Dever, Mike Gowan, Roy Lane, Brian Lilly, Krishna Nagalla, Rahul Shah, Emily Shriver, Shi-Huang Yin, Shannon V. Morton
Comments (0)