Serial reconfigurable mismatch-tolerant clock distribution

We present an unconventional clock distribution that emphasizes flexibility and layout independence. It suits a variety of applications, clock domain shapes and sizes using a modular standard cell approach that compensates intra-die temperature and process variances. Our clock distribution provides control over regional clock skew, permits use in beneficial skew applications and facilitates silicon-debug. By adding routing to the serial clock network, we permit post-silicon resizing and reshaping of clock domains. Defective sections of the clock network can be bypassed, providing post silicon repair capability to the network. Categories and Subject Descriptors B.7.3 Reliability and Testing [Integrated Circuits]. General Terms Design, Reliability. Keywords Clock networks, process variation, clock skew.

• Type: Conference
• Year: 2009
• Where: DAC
• Authors: Atanu Chattopadhyay, Zeljko Zilic
• Keywords: Clock, Clock Networks, Clock Skew, DAC 2009