Detailed routing architectures for embedded programmable logic IP cores

As the complexity of integrated circuits increases, the ability to make post-fabrication changes to fixed ASIC chips will become more and more attractive. This ability can be realized using programmable logic cores. These cores are blocks of programmable logic that can be embedded into a fixed-function ASIC or a custom chip. Such cores differ from stand-alone FPGAs in that they can take on a variety of shapes and sizes. With this in mind, we investigate the detailed routing characteristics of rectangular programmable logic cores. We quantify the effects of having different x and y channel capacities, and show that the optimum ratio between the x and y channel widths for a

• Type: Conference
• Year: 2001
• Where: FPGA
• Authors: Peter Hallschmid, Steven J. E. Wilton
• Keywords: FPGA, FPGA 2001, Programmable Logic, Programmable Logic Cores, Rectangular Programmable Logic