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FPGA
2001
ACM

Reprogrammable network packet processing on the field programmable port extender (FPX)

14 years 5 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extender (FPX), enables packet processing functions to be implemented as modular components in reprogrammable hardware. All logic on the on the FPX is implemented in two Field Programmable Gate Arrays (FPGAs). Packet processing functions in the system are implemented as dynamicallyloadable modules. Core functionality of the FPX is implemented on an FPGA called the Networking Interface Device (NID). The NID contains the logic to transmit and receive packets over a network, dynamically reprogram hardware modules, and route individual traffic flows. A full, non-blocking, switch is implemented on the NID to route packets between the networking interfaces and the modular components. Modular components of the FPX are implemented on a second FPGA called the Reprogrammable Application Device (RAD). Modules are loaded onto...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,
Added 28 Jul 2010
Updated 28 Jul 2010
Type Conference
Year 2001
Where FPGA
Authors John W. Lockwood, Naji Naufel, Jonathan S. Turner, David E. Taylor
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