Architectures that implement the Internet Protocol Security (IPSec) standard have to meet the enormous computing demands of cryptographic algorithms. In addition, IPSec architectures have to be flexible enough to adapt to diverse security parameters. Thispaper proposes anFPGAbased Adaptive Cryptographic Engine (ACE) for IPSec architectures. By taking advantage of FPGA technology, ACE can adapt to diverse security parameters on the fly while providing superior performance compared with softwarebased approaches. For example, for the final candidate algorithms of the Advanced Encryption Standard (AES), our techniques lead to throughput speed-up of £¥¤§¦©¨ while the key-setup latency time is reduced by a factor of ¦¨¤©¨©¨ compared with software-based approaches. We also develop a compression technique that reduces the memory requirements of ACE withoutthe need for dedicatedhardware. Though data compression has been extensively studied before, we are not aware of any p...
Andreas Dandalis, Viktor K. Prasanna, José