Supporting system-level power exploration for DSP applications

System-level power exploration requires tools for estimation of the overall power consumed by a system, as well as a detailed breakdown of the consumption of its main functional blocks. We focus on power estimation for data-dominated systems specied as synchronous data- ows and implemented on a singleprocessor architecture. Our estimator is integrated within the Ptolemy design environment, and provides information to system designers on the power dissipated by every task in a given speci cation. Power estimation is based on instruction-level power models. We demonstrate the applicability of our tool on a few design examples and target architectures.

• Type: Conference
• Year: 2000
• Where: GLVLSI
• Authors: Luca Benini, Marco Ferrero, Alberto Macii, Enrico Macii, Massimo Poncino
• Keywords: GLVLSI 2000, Overall Power, Power Estimation, System-level Power Exploration, VLSI