Recently, the practice of speculation in resolving data dependences has been studied as a means of extracting more instruction level parallelism (ILP). An outcome of an instruction is predicted by value predictors. The instruction and its dependent instructions can be executed simultaneously, thereby exploiting ILP aggressively. One of the serious hurdles for realizing data speculation is huge hardware budget of the predictors. In this paper, we investigate a technique reducing the budget by employing partial resolution, using fewer tag address bits than necessary to uniquely identify every instruction. Simulation results show only two tag bits are enough for achieving performance improvement comparable to full resolution, saving the hardware budget of value predictors substantially.