This work considers the use of a n S M T (simultaneous multithreading) processor in lieu of the conventional processor(s) in a router and evaluates quantitatively the potential gains as a result. An S M T processor exploits the benefits of both ILP (instruction level parallelism) and T LP (thread-level parallelism), suitable for the n e b generation routers, in which a n increased number of functions are to be implemented. The use of a n SMTprocessor not only allows router functions to be decomposed into multiple threads but also designates separate threads to handle different incoming trafic streams of a router to exploit TLP, potentially attaining performance improvement. Additionally, a n S M T processor may admit new router functions or added trafic streams relatively easily without compromising much existing performance levels, via including a new thread (or threads) to perform one newly added function or trafic stream. This router design appears to have better flexibility and ad...