Sciweavers

ISSS
2000
IEEE

Mapping Array Communication onto FIFO Communication - Towards an Implementation

14 years 4 months ago
Mapping Array Communication onto FIFO Communication - Towards an Implementation
In high-throughput real-time media processing systems, the communication between processing units is typically specified as multi-dimensional arrays. However, the implementation of such applications is mostly FIFO-based. Mapping array communication onto a FIFO-based implementation requires complex address generators if the arrays have multiple dimensions. In this paper, we present a method for mapping array communication onto an efficient microcomputer architecture implementation based on FIFO communication via shared memory. A good hardware/software partitioning for the address generation is proposed. Furthermore, a complete design flow from specification to implementation is described. We illustrate this method with a design case: the communication of video frames between the frontend and the compressor in an MPEG encoder.
Jeffrey Kang, Albert van der Werf, Paul E. R. Lipp
Added 31 Jul 2010
Updated 31 Jul 2010
Type Conference
Year 2000
Where ISSS
Authors Jeffrey Kang, Albert van der Werf, Paul E. R. Lippens
Comments (0)