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ARITH
1999
IEEE

High-Speed Inverse Square Roots

14 years 4 months ago
High-Speed Inverse Square Roots
Inverse square roots are used in several digital signal processing, multimedia, and scientific computing applications. This paper presents a high-speed method for computing inverse square roots. This method uses a table lookup, operand modification, and multiplication to obtain an initial approximation to the inverse square root. This is followed by a modified Newton-Raphson iteration, consisting of one square, one multiply-complement, and one multiplyadd operation. The initial approximation and NewtonRaphson iteration employ specialized hardware to reduce the delay, area, and power dissipation. Application of this method is illustrated through the design of an inverse square root unit for operands in the IEEE single precision format. An implementation of this unit with a 4-layer metal, 2.5 Volt, 0.25 micron CMOS standard cell library has a cycle time of 6.7 ns, an area of 0.41 mm2 , a latency of five cycles, and a throughput of one result per cycle.
Michael J. Schulte, Kent E. Wires
Added 02 Aug 2010
Updated 02 Aug 2010
Type Conference
Year 1999
Where ARITH
Authors Michael J. Schulte, Kent E. Wires
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