Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints

Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraints solving, determinization, state machine minimization, structural mapping, functional decomposition of multi-valued logic functions and relations, and finally, FPGA mapping. In our approach, learning takes place on the level of constraint acquisition and functional decomposition rather than on the lower level of programming binary switches. Our learning strategy is based on the principle of Occam's Razor, facilitating generalization and discovery. We implemented several learning algorithms using DEC-PERLE-1 FPGA board. 1 Evolving in hardware versus learning in hardware In recent years the scientific community has witnessed rapid developments in the area of Soft Computing. These approaches include Artificial Neural Nets (ANNs), Cellular Neural Nets (CNNs), Fuzzy Logic, Rough Sets, Genetic Algorithms (GAs...

• Type: Conference
• Year: 1999
• Where: EH
• Authors: Marek A. Perkowski, Alan Mishchenko, Anatoli N. Chebotarev
• Keywords: EH 1999, Functional Decomposition, Hardware, State Machine