Multi-Valued Logic Synthesis

We survey some of the methods used for manipulating, representing, and optimizing multi-valued logic with the view of both building a better understanding of the more specialized binary-valued logic, as well as motivating research towards a true multi-valued multi-level optimization package.

• Type: Conference
• Year: 1999
• Where: VLSID
• Authors: Robert K. Brayton, Sunil P. Khatri
• Keywords: Multi-valued Logic, Multi-valued Multi-level Optimization, Specialized Binary-valued Logic, VLSI, VLSID 1999