Partial Rearrangements of Space-Shared FPGAs

Abstract Oliver Diessel1 and Hossam ElGindy2 1Department of Computer Science and Software Engineering 2Department of Electrical and Computer Engineering The University of Newcastle, Callaghan NSW 2308, AUSTRALIA Dynamically recon gurable eld programmable gate arrays FPGAs appear to be highly suited to embedded high performance computing applications. They naturally support array based concurrent computations, which are often needed to meet performance requirements; applications can be rapidly prototyped, thereby reducing the time to market; and, perhaps most interestingly, they can be recon gured in system to reduce total hardware requirements, or to support new applications in the future. How to use a single FPGA chip or system to support multiple simultaneous real time circuits is currently under investigation. Such systems should execute arbitrary sequences of temporally and spatially varying tasks without degrading performance. Unfortunately, on line allocation is by nature sub opt...

• Type: Conference
• Year: 1998
• Where: IPPS
• Authors: Oliver Diessel, Hossam A. ElGindy
• Keywords: Distributed And Parallel Computing, Eld Programmable Gate, IPPS 1998, Performance Computing Applications, Recon