Sciweavers

FPL
1998
Springer

Modular Exponent Realization on FPGAs

14 years 3 months ago
Modular Exponent Realization on FPGAs
The article describes modular exponent calculations used widely in cryptographic key exchange protocols. The measures for hardware consumption and execution speed based on argument bit width and algorithm rank are created. The partitioning of calculations is analyzed with respect to interconnect signal numbers and added delay. The partitioned blocks are used for implementation approximations of two different multiplier architectures. Examples are provided for 3 families of FPGAs: XC4000, XC6200 and FLEX10k
Juri Põldre, Kalle Tammemäe, Marek Man
Added 05 Aug 2010
Updated 05 Aug 2010
Type Conference
Year 1998
Where FPL
Authors Juri Põldre, Kalle Tammemäe, Marek Mandre
Comments (0)