: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In this paper, we present a co-synthesis algorithm which starts with periodic task graphs with real-time constraints and produces a lowcost heterogeneous distributed embedded system architecture meeting the constraints. The algorithm has the following features: 1) it allows the use of multiple types of processing elements (PEs) and inter-PE communication links, where the links can take various forms (point-to-point, bus, local area network (LAN), etc.), 2) it supports both concurrent and sequential modes of communication and computation, 3) it allows both preemptive and non-preemptive scheduling, 4) it employs the concept of an association array to tackle the problem of multi-rate systems (which are commonly found in multimedia applications), 5) it uses a scheduler based on dynamic deadline-based priority levels ...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J