Sciweavers

EURODAC
1994
IEEE

A process algebra interpretation of a verification oriented overlanguage of VHDL

14 years 3 months ago
A process algebra interpretation of a verification oriented overlanguage of VHDL
The VOVHDL language was defined as a verification oriented VHDL
Catherine Bayol, Bernard Soulas, Dominique Borrion
Added 08 Aug 2010
Updated 08 Aug 2010
Type Conference
Year 1994
Where EURODAC
Authors Catherine Bayol, Bernard Soulas, Dominique Borrione, Fulvio Corno, Paolo Prinetto
Comments (0)