VHDL and cyclic corrector codes

Cyclic corrector codes, or "block codes", are often used in telecommunications systems. To facilitate the design of coding/decoding circuits using this type of code, we described the usual algorithms using VHDL. The mathematics used for these codes requires special packages to be created describing the functions on Galois Fields. The synthesis of components performing these functions provided the necessary information for choosing the model of architecture.

• Type: Conference
• Year: 1994
• Where: EURODAC
• Authors: France Mendez
• Keywords: Block Codes, Cyclic Corrector Codes, EURODAC 1994, Usual Algorithms, VHDL