We present an efficient and effective method for the detailed routing of symmetrical or sea-of-gates FPGA architectures. Instead of breaking the problem into 2-terminal net collections we propose a model in which Steiner trees spanning nets of logic blocks are constructed on grids induced by the blocks. Then a new routing technique, negative reinforcement is employed to prevent nets from blocking each other. The experimental results have proven promising.
Forbes D. Lewis, Wang Chia-Chi Pong