High-level synthesis (HLS) requires more designer interaction to better meet the needs of experienced designers. However, attempts to create a highly interactive synthesis process are hampered by incompatibility of various representations used during synthesis. To overcome this problem, equivalent representations are needed, as well as equivalence-preserving synthesis transformations. We present the Structured Finite State Machine (SFSM) design model for scheduled behavior, show its equivalence to the Control/Data Flow Graph (CDFG) model, and define primitive behavior-preserving transformations for scheduling. We have integrated this model and these transjormations into the BIF interactive environment to enable manual rescheduling of a design.
Roger P. Ang, Nikil D. Dutt