We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we investigate grid-based layouts and show a performance variance of four times as we vary grid structure and initial qubit placement. We then propose two polynomialtime design heuristics: a greedy algorithm suitable for small, congestion-free quantum circuits and a dataflow-based analysis approach to placement and routing with implicit initial placement of qubits. Finally, we show that our dataflowbased heuristic generates better layouts than the state-ofthe-art automated grid-based layout and scheduling mechanism in terms of latency and potential pipelinability, but at the cost of some area. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids--layout, place