Processor reliability enhancement through compiler-directed register file peak temperature reduction

Each semiconductor technology generation brings us closer to the imminent processor architecture heat wall, with all its associated adverse effects on system performance and reliability. Temperature hotspots not only accelerate the physical failure mechanisms such as electromigration and dielectric breakdown, but furthermore make the system more vulnerable to timing-related intermittent failures. Traditional thermal management techniques suffer from considerable performance overhead as the entire processor needs to be stalled or slowed down to preclude heat accumulation. Given the significant temporal and spatial variations of the chip-wide temperature, we propose in this paper a technique that directly targets one of the resources that is most likely to overheat in current processors, namely, the register files. Instead of duplicating or physically distributing the register file, we suggest to attain power density control through exploiting the extant spatial slack associated with reg...

• Type: Conference
• Year: 2009
• Where: DSN
• Authors: Chengmo Yang, Alex Orailoglu
• Keywords: Computer Networks, DSN 2009, Imminent Processor Architecture, Physical Register Mapping, Register File