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ACSC
2004
IEEE

Exploiting FPGA Concurrency to Enhance JVM Performance

14 years 3 months ago
Exploiting FPGA Concurrency to Enhance JVM Performance
The Java Programming Language has been praised for its platform independence and portability, but because of its slow execution speed on a software Java Virtual Machine (JVM), some people decide to use faster languages such as C. Building a JVM in hardware is an obvious solution to this problem. Several approaches have been taken to try to achieve the best solution. One approach is by reducing the number of Java instructions a program has to execute along with directly executing instructions in hardware, for example on a Field Programmable Gate Array (FPGA), to increase the execution speed. Another approach is the translation of Java Byte Codes into native code by a FPGA and then executing the native code on a conventional CPU. Others have developed a multithreaded JVM and exploited the parallelism offered by a FPGA and have specifically designed the JVM for real-time systems. This paper compares and contrasts all these approaches and then argues that the parallelism of a FPGA should ...
James Parnis, Gareth Lee
Added 20 Aug 2010
Updated 20 Aug 2010
Type Conference
Year 2004
Where ACSC
Authors James Parnis, Gareth Lee
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