An Asynchronous, Iterative Implementation of the Original Booth Multiplication Algorithm

One of the main reasons for using asynchronous design is that it offers the opportunity to exploit the datadependent latency of many operations in order to achieve low-power, high-performance, or low area. This paper describes a novel, asynchronous, iterative multiplier which exhibits data-dependency in both the number of iterations required to produce the result and in the delay of each step of the iteration. The preliminary evaluation of the multiplier, implemented using standard-cells, shows that speed improvements can be achieved in comparison to a standard iterative, radix-4 Booth multiplier.

• Type: Conference
• Year: 2004
• Where: ASYNC
• Authors: Aristides Efthymiou, W. Suntiamorntut, Jim D. Garside, L. E. M. Brackenbury
• Keywords: ASYNC 2004, Asynchronous Design, Hardware, Iterative Multiplier, Radix-4 Booth Multiplier