We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized into gate level specifications for direct fabrication of silicon chips1 . The method is applied for designing agent chips incorporating similar features found in the BDI (Belief, Desire, and Intention) and Brooks' subsumption architectures. Categories and Subject Descriptors I.2 [Computing Methodologies]: Artificial Intelligence General Terms Agent architecture, Agent Chips Keywords agent programming languages