Synthesis of Nanoelectronic Circuits on Delay-Insensitive Cellular Arrays

The difficulties of designing nanoscale circuits include the need for regular circuit structure and controlling the timing requirements. A cellular array has highly regular structure. The cells are adjacent to each other and are able to process signals based on simple transition rules. In delay-insensitive circuits the delay on a signal path does not affect circuit behavior. The combination of delay-insensitive circuit style and cellular arrays makes it possible to implement nanoscale circuits. This paper proposes a technique to synthesize and implement logic functions in Reed-Muller form onto cellular arrays. The resulting circuits have delay-insensitivity and high modularity.

• Type: Conference
• Year: 2006
• Where: DELTA
• Authors: Jia Di, Dilip P. Vasudevan
• Keywords: Cellular Arrays, Delay-insensitive Circuit, DELTA 2006, Information Management, Nanoscale Circuits