Compiler-assisted leakage energy optimization for clustered VLIW architectures

Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. Relatively simpler issue logic and the presence of a large number of function units in the VLIW and the clustered VLIW architectures attribute a large fraction of this leakage energy consumption in the functional units. However, functional units are not fully utilized in the VLIW architectures because of the inherent variations in the ILP of the programs. This underutilization is even more pronounced in the context of clustered VLIW architectures because of the contentions for the limited number of slow intercluster communication channels which lead to many short idle cycles. In the past, some architectural schemes have been proposed to obtain leakage energy benefits by aggressively exploiting the idleness of functional units. However, presence of many short idle cycles cause frequent transitions from the act...

• Type: Conference
• Year: 2006
• Where: EMSOFT
• Authors: Rahul Nagpal, Y. N. Srikant
• Keywords: EMSOFT 2006, Energy Consumption, Functional Units, Software Engineering, Vliw Architecture