Sizing of Processing Arrays for FPGA-Based Computation

14 years 2 months ago

Download www.bu.edu

Computing applications in FPGAs are commonly built from repetitive structures of computing and/or memory elements. In many cases, application performance depends on the degree of parallelism

Tom Van Court, Martin C. Herbordt

Real-time Traffic

Computing Structures | Factors Complicate Determination | FPGA | FPL 2006 | Hardware |

claim paper

» QUKU A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Network...

» FPGA Based Network Intrusion Detection using Content Addressable Memories

» Trusted Design in FPGAs

» Retargeting ImageProcessing Algorithms to Varying Processor Grain Sizes

» Application of Parallel Processors to RealTime Sensor Array Processing

» RealTime Image Processing on a Focal Plane SIMD Array

» Loop Transformation Methodologies for ArrayOriented Memory Management

» VELO A Novel Communication Engine for UltraLow Latency Message Transfers

Post Info
More Details (n/a)

Added	22 Aug 2010
Updated	22 Aug 2010
Type	Conference
Year	2006
Where	FPL
Authors	Tom Van Court, Martin C. Herbordt

Comments (0)

Sciweavers

Sizing of Processing Arrays for FPGA-Based Computation

Computing Structures | Factors Complicate Determination | FPGA | FPL 2006 | Hardware |

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers