Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures

Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hardware. However, control and data dependencies between operations limit the available ILP, which not only hinders the scalability of VLIW architectures, but also result in code size expansion. Although speculation and predicated execution mitigate ILP limitations due to control dependencies to a certain extent, they increase hardware cost and exacerbate code size expansion. Simultaneous multistreaming (SMS) can significantly improve operation throughput by allowing interleaved execution of operations from multiple instruction streams. In this paper we study SMS for VLIW architectures and quantify the benefits associated with it using a case study of the MPEG-2 video decoder. We also propose the notion of virtual resources for VLIW architectures, which decouple architectural resources (resources exposed to the c...

• Type: Conference
• Year: 2003
• Where: APCSAC
• Authors: Pradeep Rao, S. K. Nandy, M. N. V. Satya Kiran
• Keywords: APCSAC 2003, Architectures Exploit Instruction, Code Size Expansion, Computer Architecture, Vliw Architecture