Non-Stalling CounterFlow Architecture

The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making and localized clocking and data movement. We have taken these ideas and reformulated them into a substantially faster more scalable architecture that has the same distributed decision making and locality for clocking and data, but adds very aggressive speculation, no stalls, and other desirable characteristics. A high level Java simulator has been build to explore the design tradeoffs and evaluate performance. Keywords-- counterflow, CFPP, pipeline, dataflow, virtual register, VRP, counterdataflow, CDF, multithreading, architecture.

• Type: Conference
• Year: 1998
• Where: HPCA
• Authors: Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu
• Keywords: Clocking, Counterflow Pipeline Concept, Decision Making, Distributed And Parallel Computing, HPCA 1998