Mapping of DSP Algorithms on Field Programmable Function Arrays

This position paper1 discusses reconfigurability issues in low-power handheld multimedia systems. A reconfigurable systems-architecture is introduced, with a focus on a Field Programmable Function Array (FPFA). Application domain specific algorithms determine the granularity of FPFA processor tiles. Several algorithms are discussed and mapped onto a FPFA processor tile.

• Type: Conference
• Year: 2000
• Where: FPL
• Authors: Paul M. Heysters, Jaap Smit, Gerard J. M. Smit, Paul J. M. Havinga
• Keywords: Domain Specific Algorithms, Fpfa Processor Tile, FPL 2000, Hardware, Low-power Handheld Multimedia