Networked reconfiguration is an enabling technology for cost effective service deployment and maintenance. A hardware virtual machine to enable this networked reconfigurapresented. An abstract FPGA model is the core of ardware virtual machine. Based on this abstract FPGA model, the traditional implementation flow of FPGA has been separated into two parts: the service provider's side and client's side. We show how to split the FPGA design flow to enable this networked reconfiguration and present first results in the efficiency of the bytefiles for a hardware virtual machine.